Projects
Design work and tooling I have led or contributed to during my PhD.
2026 – present
Autonomously integrate a BLE-compatible backscatter sensor SoC in TSMC 55nm ULP technology, enabling smartphones to directly read sensor data without separate gateway hardware.
2025 – present
Open-source analog circuit sizing tool based on BoTorch qEHVI multi-objective Bayesian optimization, supporting gm/Id physical prior warm-start, non-invasive YAML integration with existing Spectre flows.
2024 – present
Use Kolmogorov–Arnold Networks (KAN) to replace traditional LMS/Volterra calibration of noise-shaping SAR ADC nonlinear mismatch, achieving 12-bit effective resolution in behavioral-level modeling.
